verilog rules

Setup

bazel_dep(name = "rules_verilog", version = "{version}")

load("@rules_verilog//verilog:defs.bzl", "verilog_library")

verilog_library(name, deps, srcs, hdrs, compile_data, top)

TODO

ATTRIBUTES

Name	Description	Type	Mandatory	Default
name	A unique name for this target.	Name	required
deps	The list of other libraries to be linked.	List of labels	optional	`[]`
srcs	Verilog or SystemVerilog sources.	List of labels	optional	`[]`
hdrs	Verilog or SystemVerilog headers.	List of labels	optional	`[]`
compile_data	TODO	List of labels	optional	`[]`
top	The top of the module. If unset, a file must be found matching the name of the target.	Label	optional	`None`

load("@rules_verilog//verilog:defs.bzl", "VerilogInfo")

VerilogInfo(compile_data, deps, hdrs, srcs, top)

Verilog provider

FIELDS

Name	Description
compile_data	Depset[File]: Files required at compile time.
deps	Depset[VerilogInfo]: Transitive Verilog dependencies.
hdrs	Depset[File]: Verilog/SystemVerilog header files.
srcs	Depset[File]: Verilog/SystemVerilog source files.
top	File: The source file that represents the module top. The file name is expected to match the module name.